State Machines on Digital Logic Notebook

What Is a State Machine?

Mon, 01 Jan 0001 00:00:00 +0000

What Is a State Machine?#

A finite state machine is the most general form a sequential circuit can take. It is defined by three things: a finite set of states, a rule for choosing the next state from the current state and the inputs, and a rule for producing outputs. Anything that has to remember where it is and act on what happens next — a controller, a protocol handler, a vending machine — is a state machine.

Moore vs. Mealy

Mon, 01 Jan 0001 00:00:00 +0000

Moore vs. Mealy#

The two classic styles of state machine differ in one respect: what the outputs depend on. It is the first design decision after deciding a machine is needed, and it trades response speed against clean, predictable timing.

The Distinction#

A Moore machine’s outputs depend only on the current state. The output logic looks at the state register and nothing else, so outputs change only after a clock edge moves the machine to a new state.
A Mealy machine’s outputs depend on the current state and the current inputs together. An input change can ripple straight to an output within the same state, without waiting for a clock edge.

The Trade-off#

Because a Moore output is a function of the registered state alone, it is clean and glitch-free — it changes synchronously, once per transition, and never twitches in response to a noisy input. The cost is a step of latency (the machine must clock into a new state before the output reflects an input) and sometimes more states, since distinctions that a Mealy machine draws with inputs must become separate states.

State Diagrams

Mon, 01 Jan 0001 00:00:00 +0000

State Diagrams#

A state diagram is how a state machine is designed before any gates exist. States are drawn as bubbles and transitions as arrows labeled with the input condition that causes them. It is the specification the machine is reasoned about — the logic is derived from the diagram, not the other way around.

A Worked Example#

The canonical example is a turnstile. It has two states — Locked and Unlocked — and two inputs: inserting a coin and pushing the arm.

State Encoding

Mon, 01 Jan 0001 00:00:00 +0000

State Encoding#

Once a state machine’s behavior is captured, each state has to be assigned a bit pattern in the state register. The behavior is identical whatever the assignment, but the encoding strongly affects how much logic the machine costs, how fast it runs, and how safely it fails — so it is a real design choice, not a formality.

Three Common Schemes#

Binary (sequential) — number the states 0, 1, 2, … and store the number in ⌈log₂ N⌉ flip-flops. This uses the fewest flip-flops, which mattered when flip-flops were expensive discrete parts. The cost is more complex next-state and output logic, and several bits can change on one transition — a source of decoding glitches.
Gray code — order the state codes so that adjacent states differ by a single bit. Only one flip-flop changes per step, which reduces simultaneous switching and makes decoded outputs cleaner. It is most useful for machines that march through states in order, and for values that cross clock domains.
One-hot — give each state its own flip-flop, with exactly one set at a time. It spends the most flip-flops (N of them for N states) but makes the next-state and output logic trivial and fast: “am I in state X” is just one flip-flop’s output, with no decoding. A one-hot machine is essentially a ring counter following the state diagram.

Choosing One#

The trade is flip-flops against logic. In the discrete and early-integrated eras, flip-flops were the scarce resource, so binary encoding dominated. In an FPGA, flip-flops come essentially free with every logic block while wide combinational logic is what’s precious — so one-hot is frequently the default, trading spare flip-flops for smaller, faster logic and glitch-free decoding.

Sequencers

Mon, 01 Jan 0001 00:00:00 +0000

Sequencers#

A sequencer is a state machine in its most restricted, most common form: one that steps through a fixed sequence of states, mostly marching forward rather than branching on inputs. Where a general FSM asks “given where I am and what just happened, where do I go?”, a sequencer mostly just asks “what is the next step?” That narrower job has simple, efficient realizations.

How They’re Built#

Counter plus decoder — a synchronous counter advances through binary states and a decoder turns the current count into one active “step” line. Compact, and the count is also directly available.
Ring or Johnson counter — a ring counter is the simplest sequencer of all: the single circulating one-hot bit is the current step, already decoded and glitch-free, with no separate decoder needed.
A small FSM — when a few input-dependent decisions are needed (wait here until ready, skip a step under some condition), a general state machine handles the branches the pure counter forms cannot.

Where They’re Used#

Sequencers run the parts of a system that must happen in a fixed order: multi-phase clock generation, memory and bus access cycles, stepper-motor phase drive, display and keypad scanning, and pattern or waveform generation. Their most consequential use is the control unit of a processor — a microsequencer that steps an address counter through a ROM whose contents are the control signals for each step (microcode) and the address of the next step. That is how a great many CPUs turn an instruction into an ordered series of register-transfer operations: a sequencer, a memory, and the datapath registers it steers. The counting family’s pattern circulators and the state-machine family’s controllers meet exactly here.