I2S Audio Pipelines on Embedded Systems Development

I2S DMA Buffer Management

Mon, 01 Jan 0001 00:00:00 +0000

I2S DMA Buffer Management#

DMA is what makes continuous audio possible on a microcontroller. Without it, the CPU would need to service an interrupt for every sample — at 48 kHz stereo, that means 96,000 interrupts per second, leaving almost no time for actual audio processing. DMA transfers blocks of samples between the I2S peripheral and memory autonomously, and the CPU only needs to act when an entire buffer (or half-buffer) is ready. The engineering challenge is choosing the right buffer structure, size, and alignment to guarantee glitch-free audio while keeping latency within application requirements.

Audio Codec Integration

Mon, 01 Jan 0001 00:00:00 +0000

Audio Codec Integration#

An external audio codec IC combines an ADC, DAC, headphone/speaker amplifiers, microphone preamplifiers, and analog mixing — all controlled through a digital register interface. The MCU connects to the codec over two separate buses: I2S (or TDM) for audio data, and I2C (sometimes SPI) for configuration and control. Getting both buses configured correctly, with the right clock relationships and power-up sequence, is the core integration challenge. The audio data path is straightforward once the codec is properly initialized; most integration failures trace back to clock misconfiguration or incorrect register settings during startup.

TDM & Multi-Channel Audio

Mon, 01 Jan 0001 00:00:00 +0000

TDM & Multi-Channel Audio#

Standard I2S carries two channels (left and right) in a single frame. TDM (Time-Division Multiplexing) extends this by packing multiple channels into the same frame — 4, 8, or even 16 slots on a single data line, each carrying one channel of audio. This is the standard approach for microphone arrays, multi-channel mixers, and any application that needs more than two channels without adding physical I2S buses. The I2S peripheral on many MCUs (STM32 SAI, ESP32 I2S, nRF52 I2S) supports TDM natively, though the configuration differs substantially between platforms.

Sample Rate Conversion

Mon, 01 Jan 0001 00:00:00 +0000

Sample Rate Conversion#

Sample rate conversion (SRC) becomes necessary whenever two audio components in a system operate at different sample rates — a 16 kHz voice capture feeding a 48 kHz playback pipeline, a USB audio interface at 44.1 kHz connected to an I2S codec at 48 kHz, or two I2S buses clocked from independent oscillators that drift relative to each other. On a desktop, SRC is a library call with negligible CPU cost. On a Cortex-M4, a high-quality sample rate converter can consume 30–50% of the available cycles, making the choice of algorithm and quality level a direct engineering trade-off.

S/PDIF Digital Audio

Mon, 01 Jan 0001 00:00:00 +0000

S/PDIF Digital Audio#

S/PDIF (Sony/Philips Digital Interface) carries stereo PCM audio over a single unidirectional connection — either a coaxial cable or a TOSLINK optical fiber. Unlike I2S, which uses separate clock and data lines, S/PDIF embeds the clock in the data stream using biphase mark coding. This self-clocking property means only one signal wire is needed, but it also means the receiver must recover the clock from the incoming bitstream, introducing jitter sensitivity that does not exist in I2S links.