<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Choosing the Right Platform on Embedded Systems Development</title><link>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/</link><description>Recent content in Choosing the Right Platform on Embedded Systems Development</description><generator>Hugo</generator><language>en-us</language><atom:link href="https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/index.xml" rel="self" type="application/rss+xml"/><item><title>MCU vs MPU — When to Use Which</title><link>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/mcu-vs-mpu/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/mcu-vs-mpu/</guid><description>&lt;h1 id="mcu-vs-mpu--when-to-use-which"&gt;MCU vs MPU — When to Use Which&lt;a class="anchor" href="#mcu-vs-mpu--when-to-use-which"&gt;#&lt;/a&gt;&lt;/h1&gt;
&lt;p&gt;The split between microcontrollers and microprocessors is the first fork in any embedded design. An MCU like the STM32F405 integrates 1 MB of flash, 192 KB of SRAM, and dozens of peripherals onto a single chip — power on and code executes in microseconds. An MPU like the Raspberry Pi CM4 (BCM2711, quad-core Cortex-A72) needs external DDR, an SD card or eMMC for storage, and boots a full Linux kernel in seconds. These are fundamentally different computing models, and picking the wrong one either over-constrains the software or over-complicates the hardware.&lt;/p&gt;</description></item><item><title>Key Specs That Actually Matter</title><link>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/key-specs-that-matter/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/key-specs-that-matter/</guid><description>&lt;h1 id="key-specs-that-actually-matter"&gt;Key Specs That Actually Matter&lt;a class="anchor" href="#key-specs-that-actually-matter"&gt;#&lt;/a&gt;&lt;/h1&gt;
&lt;p&gt;MCU datasheets list hundreds of parameters, but most projects are decided by a handful of specifications that interact with each other. A 200 MHz clock means little if the flash has 5 wait states and no cache. A 12-bit ADC sounds capable until the effective number of bits (ENOB) turns out to be 9.5 at full speed. Learning to read past the headline numbers and focus on the specs that constrain real designs separates productive part selection from spec-sheet paralysis.&lt;/p&gt;</description></item><item><title>Popular MCU Families Compared</title><link>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/popular-mcu-families/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/popular-mcu-families/</guid><description>&lt;h1 id="popular-mcu-families-compared"&gt;Popular MCU Families Compared&lt;a class="anchor" href="#popular-mcu-families-compared"&gt;#&lt;/a&gt;&lt;/h1&gt;
&lt;p&gt;No single MCU family is best for everything. Each has a core strength — wireless integration, toolchain maturity, price, or community momentum — and a set of tradeoffs that make it a poor fit for certain projects. Understanding what each family does well, and where it struggles, prevents the common mistake of choosing a chip based on familiarity rather than fit.&lt;/p&gt;
&lt;h2 id="family-overview"&gt;Family Overview&lt;a class="anchor" href="#family-overview"&gt;#&lt;/a&gt;&lt;/h2&gt;
&lt;table&gt;
 &lt;thead&gt;
 &lt;tr&gt;
 &lt;th&gt;Family&lt;/th&gt;
 &lt;th&gt;Core&lt;/th&gt;
 &lt;th&gt;Clock (MHz)&lt;/th&gt;
 &lt;th&gt;Flash&lt;/th&gt;
 &lt;th&gt;RAM&lt;/th&gt;
 &lt;th&gt;Wireless&lt;/th&gt;
 &lt;th&gt;Typical Price (1K)&lt;/th&gt;
 &lt;/tr&gt;
 &lt;/thead&gt;
 &lt;tbody&gt;
 &lt;tr&gt;
 &lt;td&gt;STM32F4&lt;/td&gt;
 &lt;td&gt;Cortex-M4F&lt;/td&gt;
 &lt;td&gt;168&lt;/td&gt;
 &lt;td&gt;256 KB–2 MB&lt;/td&gt;
 &lt;td&gt;128–256 KB&lt;/td&gt;
 &lt;td&gt;No&lt;/td&gt;
 &lt;td&gt;$3–6&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;STM32H7&lt;/td&gt;
 &lt;td&gt;Cortex-M7&lt;/td&gt;
 &lt;td&gt;480&lt;/td&gt;
 &lt;td&gt;128 KB–2 MB&lt;/td&gt;
 &lt;td&gt;1 MB&lt;/td&gt;
 &lt;td&gt;No&lt;/td&gt;
 &lt;td&gt;$7–12&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;ESP32-S3&lt;/td&gt;
 &lt;td&gt;Xtensa LX7 (dual)&lt;/td&gt;
 &lt;td&gt;240&lt;/td&gt;
 &lt;td&gt;8 MB (ext)&lt;/td&gt;
 &lt;td&gt;512 KB&lt;/td&gt;
 &lt;td&gt;WiFi + BLE 5&lt;/td&gt;
 &lt;td&gt;$2–3&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;nRF52840&lt;/td&gt;
 &lt;td&gt;Cortex-M4F&lt;/td&gt;
 &lt;td&gt;64&lt;/td&gt;
 &lt;td&gt;1 MB&lt;/td&gt;
 &lt;td&gt;256 KB&lt;/td&gt;
 &lt;td&gt;BLE 5.3, 802.15.4&lt;/td&gt;
 &lt;td&gt;$3–5&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;nRF5340&lt;/td&gt;
 &lt;td&gt;Cortex-M33 + M4&lt;/td&gt;
 &lt;td&gt;128/64&lt;/td&gt;
 &lt;td&gt;1 MB&lt;/td&gt;
 &lt;td&gt;512 KB&lt;/td&gt;
 &lt;td&gt;BLE 5.4, direction finding&lt;/td&gt;
 &lt;td&gt;$4–6&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;RP2040&lt;/td&gt;
 &lt;td&gt;Cortex-M0+ (dual)&lt;/td&gt;
 &lt;td&gt;133&lt;/td&gt;
 &lt;td&gt;16 MB (ext)&lt;/td&gt;
 &lt;td&gt;264 KB&lt;/td&gt;
 &lt;td&gt;No&lt;/td&gt;
 &lt;td&gt;$0.70&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;ATmega328P&lt;/td&gt;
 &lt;td&gt;AVR (8-bit)&lt;/td&gt;
 &lt;td&gt;20&lt;/td&gt;
 &lt;td&gt;32 KB&lt;/td&gt;
 &lt;td&gt;2 KB&lt;/td&gt;
 &lt;td&gt;No&lt;/td&gt;
 &lt;td&gt;$1.50&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;PIC18F&lt;/td&gt;
 &lt;td&gt;PIC (8-bit)&lt;/td&gt;
 &lt;td&gt;64&lt;/td&gt;
 &lt;td&gt;128 KB&lt;/td&gt;
 &lt;td&gt;4 KB&lt;/td&gt;
 &lt;td&gt;No&lt;/td&gt;
 &lt;td&gt;$1–2&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;ESP32-C3&lt;/td&gt;
 &lt;td&gt;RISC-V&lt;/td&gt;
 &lt;td&gt;160&lt;/td&gt;
 &lt;td&gt;4 MB (ext)&lt;/td&gt;
 &lt;td&gt;400 KB&lt;/td&gt;
 &lt;td&gt;WiFi + BLE 5&lt;/td&gt;
 &lt;td&gt;$1–2&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;CH32V003&lt;/td&gt;
 &lt;td&gt;RISC-V&lt;/td&gt;
 &lt;td&gt;48&lt;/td&gt;
 &lt;td&gt;16 KB&lt;/td&gt;
 &lt;td&gt;2 KB&lt;/td&gt;
 &lt;td&gt;No&lt;/td&gt;
 &lt;td&gt;$0.10&lt;/td&gt;
 &lt;/tr&gt;
 &lt;/tbody&gt;
&lt;/table&gt;
&lt;h2 id="stm32--the-broad-range"&gt;STM32 — The Broad Range&lt;a class="anchor" href="#stm32--the-broad-range"&gt;#&lt;/a&gt;&lt;/h2&gt;
&lt;p&gt;ST&amp;rsquo;s STM32 line spans from the ultra-low-power L0 (Cortex-M0+, 32 MHz, sub-uA stop) to the H7 (Cortex-M7, 480 MHz, 1 MB RAM). CubeMX generates peripheral initialization code, and the HAL library covers most peripherals. The ecosystem is mature: Keil, IAR, GCC, and CubeIDE all work. The weakness is complexity — the HAL is verbose, CubeMX-generated code can be opaque, and the sheer number of part variants (over 1,000 SKUs) makes selection itself a project. Supply chain exposure became a headline issue during 2021–2023: STM32F4 and STM32H7 lead times stretched to 52+ weeks, and spot pricing for some parts exceeded 10x the normal rate. ST manufactures primarily through a small number of fabs, making the line vulnerable to single-source disruption. Designing with pin-compatible alternatives (GD32, AT32 from Artery) or maintaining a firmware HAL that can retarget to a different family provides insurance.&lt;/p&gt;</description></item><item><title>Packages &amp; Solderability</title><link>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/packages-and-solderability/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/packages-and-solderability/</guid><description>&lt;h1 id="packages--solderability"&gt;Packages &amp;amp; Solderability&lt;a class="anchor" href="#packages--solderability"&gt;#&lt;/a&gt;&lt;/h1&gt;
&lt;p&gt;The package a microcontroller comes in determines how the board is assembled, how prototyping works, and whether rework is feasible. A design that requires BGA reflow is not getting hand-assembled in a home lab. Conversely, choosing a DIP package for production adds unnecessary board area and limits MCU selection to a shrinking set of legacy parts. Package choice is a design constraint that affects the entire project lifecycle from first prototype to volume manufacturing.&lt;/p&gt;</description></item><item><title>Ecosystem &amp; Vendor Lock-In</title><link>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/ecosystem-and-vendor-lock-in/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://applied-ee.github.io/embedded/docs/foundations/choosing-the-right-mcu/ecosystem-and-vendor-lock-in/</guid><description>&lt;h1 id="ecosystem--vendor-lock-in"&gt;Ecosystem &amp;amp; Vendor Lock-In&lt;a class="anchor" href="#ecosystem--vendor-lock-in"&gt;#&lt;/a&gt;&lt;/h1&gt;
&lt;p&gt;The silicon is only half the decision. The toolchain, HAL, documentation, community, and long-term supply chain behind an MCU determine whether development moves quickly or bogs down in obscure register configurations and unanswered forum posts. A technically superior chip with a broken IDE and sparse documentation costs more in engineering time than a slightly less capable part with a polished ecosystem. Vendor lock-in compounds this: firmware written against a proprietary HAL does not port to a different vendor without substantial rewriting.&lt;/p&gt;</description></item></channel></rss>